Difference between revisions of "IIT 3C87SX-20"
| Line 2: | Line 2: | ||
[[File: IIT 3C87SX-20 (back).jpg|thumb|IIT 3C87SX-20 processor (back)]] | [[File: IIT 3C87SX-20 (back).jpg|thumb|IIT 3C87SX-20 processor (back)]] | ||
| − | The IIT 3C87SX-20 is a math coprocessor and was designed to work with an Intel or AMD 80386SX processor. | + | The IIT 3C87SX-20 is a math coprocessor and was designed to work with an Intel or AMD 80386SX processor. The main CPU is able to offload floating point arithmetic operations to this coprocessor, so that overall system performance can improve during processor-intensive tasks involving these types of calculations. |
This 32-bit chip was introduced in 1989, came with core frequencies of 16, 20, 25 and 33 MHz, and had a PLCC-68 package type. This particular unit is manufactured in week 2/1992. | This 32-bit chip was introduced in 1989, came with core frequencies of 16, 20, 25 and 33 MHz, and had a PLCC-68 package type. This particular unit is manufactured in week 2/1992. | ||
Revision as of 14:22, 4 May 2021
.jpg)
.jpg)
The IIT 3C87SX-20 is a math coprocessor and was designed to work with an Intel or AMD 80386SX processor. The main CPU is able to offload floating point arithmetic operations to this coprocessor, so that overall system performance can improve during processor-intensive tasks involving these types of calculations.
This 32-bit chip was introduced in 1989, came with core frequencies of 16, 20, 25 and 33 MHz, and had a PLCC-68 package type. This particular unit is manufactured in week 2/1992.
Coprocessors
Before the Intel 80486 CPU existed, CPUs only performed integer calculation instructions. Floating-point calculations had to be done in software, which was much slower. To address this shortfall, Intel designed a separate math coprocessor, also commonly called a Floating Point Unit (FPU).